1. Field of the Invention
The present invention relates to signal processing systems. More specifically, the present invention relates to data compression encoders.
2. Description of the Related Art
Data compression is used in a variety of applications to encode data using fewer bits than the original representation in order to reduce the consumption of resources such as storage space or transmission bandwidth. Lossless data compression accomplishes this without any loss of information; that is, the original data can be reconstructed exactly from the encoded data.
Lossless data compression algorithms typically include two sections: a preprocessor, which transforms the input data using a statistical model into samples that can be more efficiently compressed (so that certain symbols occur more frequently than others), and an encoder, which encodes the transformed data using a scheme such that more probable symbols produce shorter output than improbable symbols. Entropy encoders encode symbols such that the code length is proportional to the probability of the symbol. More common symbols therefore use the shortest codes.
Several entropy encoding algorithms are known in the art. The Consultive Committee for Space Data Systems (CCSDS) has recommended the Rice algorithm. A Rice encoder divides an input word into two variable-length sections. One section is encoded using fundamental sequence encoding, and the other section is left alone (remains binary).
A Rice encoder is usually implemented in software running on a computer system. This implies high power consumption, weight, size, and recurring cost. Certain applications, particularly space or airborne applications, have size, weight, and power constraints that would prohibit the use of a large computer system. In addition, some applications require that the encoded data is output at a rate matching that of the incoming data. These applications require an encoder that can operate at faster processing speeds than can be achieved with conventional software implementations. A hardware approach could potentially offer faster processing speeds as well as smaller size, weight, and power consumption; however, conventional encoder architectures are either too large to realize in current digital technologies, or are too slow (i.e., output rates are slower than input rates).
Hence, a need exists in the art for an improved encoder offering smaller size, weight, and power consumption, as well as faster processing speeds than conventional implementations.